A new teardown of the Apple A9 SoC from Chipworks has revealed that both Samsung and TSMC are fabbing Apple’s latest processor — and it’s the Samsung design that has the edge in overall surface area. In 2014, when TSMC finally wrested Apple’s cutting-edge 20nm design away from Samsung, rumors soon surfaced that Apple would head back to its longtime foundry frenemy to create 14nm designs. Then, months later, we heard rumors that Apple was moving some parts back to TSMC, due to yield problems with Samsung’s 14nm.
There are some facets of the current situation that are still unclear, since neither company is falling over itself to disclose such confidential information. But the fact that Apple is tapping both foundries, even after Samsung signed up GlobalFoundries as a second source, speaks to significant yield problems across the board. That’s puzzling, in and of itself, because Samsung’s 14nm chips for its Galaxy devices haven’t seemed to suffer any yield trouble. Whether this speaks to difficulty with certain aspects of the A9 SoC design or to Samsung’s decision to prioritize its own 14nm capacity for itself is still unknown.
Bringing up the same design at two different foundries and moving both of them into volume production, however, is quite expensive — Apple can easily afford to pay for it, but the company would’ve only taken this step if it felt it had no choice but to do so.
The size difference — Samsung’s version of the chip is about 8% smaller than TSMC’s — comes courtesy of superior scaling. It’s common for the foundry industry to talk about specific nodes as if each implementation of that node is identical to every other. When Intel, TSMC, and Samsung all claim to be building 14nm processors, it’s implied that all three companies are on equal footing. This is often not the case, as the chart below makes clear.
Intel’s 14nm is substantially smaller than what TSMC or Samsung call 14nm, sometimes by significant margins. With that said, the 8% gap between TSMC and Samsung’s die isn’t simply explained by any single metric — feature sizes on a die depend on what kind of feature you’re building, and SoCs contain many different types of logic, from memory caches to CPU cores. The gap between the two companies implies that Apple’s A9 is built on TSMC’s first-generation 16nm technology; the second generation (16FF+) was designed to close power and performance gaps between TSMC and its Korean competitor.
Chipworks’s general teardown suggests that the new SoC packs an 8MB L3 cache serving the same dual-core configuration that the company has preferred for years. There’s also an estimated 3MB of shared L2 cache and possibly a six-core GPU. The new SoC uses LPDDR4, steps up to 2GB of RAM (as rumored) and, according to early performance previews, offers blazing-fast performance compared with any other hardware on the market.
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